Inventor · San Jose, CA, US

Toshi Takayanagi

3Patents
2h-index
7Co-inventors
30Inventor score

Filing activity: Apr 7, 2010 → Aug 21, 2012

Most-cited inventions

PatentTitleAreaCited byStatus
US8271812B2 Hardware automatic performance state transitions in system on processor sleep and wake events Emerging Cross-Sectional Technologies 16 Active
US9009451B2 Instruction type issue throttling upon reaching threshold by adjusting counter increment amount for issued cycle and decrement amount for not issued cycle Emerging Cross-Sectional Technologies 5 Active
US8443216B2 Hardware automatic performance state transitions in system on processor sleep and wake events Emerging Cross-Sectional Technologies 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.