Xiaoming Sui
3Patents
1h-index
7Co-inventors
30Inventor score
Filing activity: Sep 22, 2015 → Jan 29, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9437528B1 | Dual-side exposed semiconductor package with ultra-thin die and manufacturing method thereof | Electricity | 7 | Active |
| US11062969B2 | Wafer level chip scale package structure and manufacturing method thereof | Electricity | 0 | Active |
| US10242926B2 | Wafer level chip scale package structure and manufacturing method thereof | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.