Methods and apparatus for equalization of a high speed serial bus
US10002101B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2015 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Jan 9, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3287
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for equalization of a high speed serial bus. A well-tuned passive equalization circuit for use with high frequency differential signals suffer from e.g., impedance mismatches, impedance discontinuities (e.g., connectors, etc.). In one embodiment, a shunting circuit is inserted between the differential terminals of a Universal Serial Bus (USB) cable, connector, etc. The shunting circuit is configured to “open” at low frequencies to enable Full Speed (FS) enumeration, while also providing sufficiently high impedance at high frequencies to enable High Speed (HS) operation. In one such implementation, the shunting circuit includes a tuned resistor, capacitor, inductor, and switch element arranged in series.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.