Zhiping Yang
21Patents
5h-index
21Co-inventors
69Inventor score
Filing activity: Aug 11, 2003 → Jul 2, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8727793B2 | Optical module design in an SFP form factor to support increased rates of data transmission | Electricity | 28 | Active |
| US7254032B1 | Techniques for providing EMI shielding within a circuit board component | Electricity | 19 | Expired |
| US7486702B1 | DDR interface for reducing SSO/SSI noise | Physics | 19 | Expired |
| US6992374B1 | Techniques for manufacturing a circuit board with an improved layout for decoupling capacitors | Emerging Cross-Sectional Technologies | 10 | Expired |
| US7262974B2 | Techniques for alleviating the need for DC blocking capacitors in high-speed differential signal pairs | Electricity | 6 | Expired |
| US7675147B1 | Methods and apparatus for providing a power signal to an area array package | Emerging Cross-Sectional Technologies | 4 | Active |
| US9087846B2 | Systems and methods for high-speed, low-profile memory packages and pinout designs | Electricity | 4 | Active |
| US9414497B2 | Semiconductor package including an embedded circuit component within a support structure of the package | Electricity | 3 | Active |
| US9129908B2 | Manufacturing a semiconductor package including an embedded circuit component within a support structure of the package | Electricity | 3 | Active |
| US10002101B2 | Methods and apparatus for equalization of a high speed serial bus | Physics | 3 | Active |
| US9466571B2 | Systems and methods for high-speed, low-profile memory packages and pinout designs | Electricity | 2 | Active |
| US10296773B2 | Capacitive sensing array having electrical isolation | Physics | 1 | Active |
| US7360307B2 | Techniques for manufacturing a circuit board with an improved layout for decoupling capacitors | Emerging Cross-Sectional Technologies | 1 | Active |
| USD1071566S1 | Cleansing brush | General | 1 | Active |
| US7303941B1 | Methods and apparatus for providing a power signal to an area array package | Emerging Cross-Sectional Technologies | 1 | Expired |
| USD1064405S1 | Automatic curling iron | General | 1 | Active |
| US9583452B2 | Systems and methods for high-speed, low-profile memory packages and pinout designs | Electricity | 0 | Active |
| US7924911B2 | Techniques for simulating a decision feedback equalizer circuit | Physics | 0 | Active |
| US9853016B2 | Systems and methods for high-speed, low-profile memory packages and pinout designs | Electricity | 0 | Active |
| US11329414B2 | Conductive receptacle collar for desense mitigation | Electricity | 0 | Active |
| US10628654B2 | Capacitive sensing array having electrical isolation | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.