Resistive memory cell with sloped bottom electrode
US10003021B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2014 |
| Grant date | Jun 19, 2018 |
| Priority date | — |
| Expiry date | Feb 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
A method of forming a resistive memory cell, e.g., a CBRAM or ReRAM cell, may include forming a plurality of bottom electrode connections, depositing a bottom electrode layer over the bottom electrode connections, performing an etch to remove portions of the bottom electrode layer to form at least one upwardly-pointing bottom electrode region above the bottom electrode connections, each upwardly-pointing bottom electrode region defining a bottom electrode tip, and forming an electrolyte region and a top electrode over each bottom electrode tip such that the electrolyte region is arranged between the top electrode and the respective bottom electrode top.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.