Integrated circuit chip and a method for testing the same
US10006965B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2016 |
| Grant date | Jun 26, 2018 |
| Priority date | — |
| Expiry date | Sep 16, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318558
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit chip includes at least two integrated circuits, at least three scan chains, and a multiplexor circuitry. Each integrated circuit includes an integrated circuit input port and an integrated circuit output port. The scan chains and the integrated circuits are coupled by default with a series chain having integrated circuits and scan chains alternating each other. The series chain starts with an initial scan chain and ends with the end scan chain. Each scan chain except the initial one includes a first scan chain input port coupled by default with the integrated circuit output port of the respective adjacent integrated circuit. Each scan chain except the end one includes a first scan chain output port coupled by default with the integrated circuit input port of the respective adjacent integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.