Complementary metal oxide semiconductor device and method of forming the same
US10008599B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2017 |
| Grant date | Jun 26, 2018 |
| Priority date | — |
| Expiry date | Mar 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0167
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A complementary metal oxide semiconductor (CMOS) device is disclosed. The CMOS device includes a substrate with a first device region and a second device region formed thereon. A first isolation structure is formed in the first device region, and includes a first trench filled with a first material. A second isolation structure is formed in the second device region and includes a second trench filled with a second material. The first material and the second material have different stresses. A first gate structure is disposed atop the first material and completely covering the first trench. A second gate structure is disposed atop the second material and completely covering the second trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.