System and method of calibrating input signal to successive approximation register (SAR) analog-to-digital converter (ADC) in ADC-assisted time-to-digital converter (TDC)
US10009036B2 · kind B2 · utility
2Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2017 |
| Grant date | Jun 26, 2018 |
| Priority date | — |
| Expiry date | Feb 10, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/183
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and a method. The apparatus includes a counter array; a ring oscillator that is electrically coupled to the counter array, where the counter array counts a number of cycles in the ring oscillator; an analog-to-digital converter (ADC) driver that is electrically coupled to the ring oscillator; and an ADC that is electrically coupled to the ADC driver, where an output of the ADC is electrically coupled to the ring oscillator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.