High level programming language core protection for high level synthesis
US10013517B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2016 |
| Grant date | Jul 3, 2018 |
| Priority date | — |
| Expiry date | Apr 3, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
High level synthesis for a circuit design may include detecting, using a processor, an encrypted, high level programming language (HLL) core for inclusion in a circuit design, decrypting, using the processor, the encrypted HLL core into volatile memory, and generating, using the processor, an encrypted, intermediate representation (IR) of the circuit design including an encrypted IR of the HLL core. An encrypted hardware description language (HDL) circuit design may be generated, using the processor, from the encrypted IR of the circuit design. The encrypted HDL circuit design includes an encrypted HDL core that is functionally equivalent to the encrypted HLL core.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.