XILINX, INC.
🏢 View company profile →4,981Patents
3,146Active
4,981Granted
60Portfolio score
Filing activity: Sep 26, 1984 → Nov 14, 2023 · 1,127 expiring within 5 years
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4870302A | Configurable electrical circuit having configurable logic elements and configurable interconnects | Electricity | 883 | Expired |
| US4706216A | Configurable logic element | Electricity | 530 | Expired |
| US5426378A | Programmable logic device which stores more than one configuration and means for switching configurations | Electricity | 506 | Expired |
| US4642487A | Special interconnect for configurable logic array | Electricity | 455 | Expired |
| US6950771B1 | Correlation of electrical test data with physical defect data | Physics | 423 | Expired |
| US6917219B2 | Multi-chip programmable logic device having configurable logic circuitry and configuration data storage on different dice | Electricity | 394 | Expired |
| US5646545A | Time multiplexed programmable logic device | Electricity | 377 | Expired |
| US5914616A | FPGA repeatable interconnect structure with hierarchical interconnect lines | Electricity | 373 | Expired |
| USRE34363E | Configurable electrical circuit having configurable logic elements and configurable interconnects | General | 372 | Expired |
| US5469003A | Hierarchically connectable configurable cellular array | Electricity | 367 | Expired |
| US5883525A | FPGA architecture with repeatable titles including routing matrices and logic matrices | Electricity | 360 | Expired |
| US5744979A | FPGA having logic cells configured by SRAM memory cells and interconnect configured by antifuses | Electricity | 330 | Expired |
| US5349250A | Logic structure and circuit for fast carry | Physics | 321 | Expired |
| US6864156B1 | Semiconductor wafer with well contacts on back side | Electricity | 318 | Expired |
| US6091263A | Rapidly reconfigurable FPGA having a multiple region architecture with reconfiguration caches useable as data RAM | Electricity | 318 | Expired |
| US7068072B2 | Integrated circuit with interface tile for coupling to a stacked-die second integrated circuit | Electricity | 299 | Expired |
| US5343406A | Distributed memory architecture for a configurable logic array and method for using distributed memory | Electricity | 291 | Expired |
| US4758985A | Microprocessor oriented configurable logic element | Electricity | 282 | Expired |
| US5880598A | Tile-based modular routing resources for high density programmable logic device | Electricity | 282 | Expired |
| US5825202A | Integrated circuit with field programmable and application specific logic areas | Electricity | 277 | Expired |
| US6011407A | Field programmable gate array with dedicated computer bus interface and method for configuring both | Electricity | 273 | Expired |
| US6084429A | PLD having a window pane architecture with segmented and staggered interconnect wiring between logic block arrays | Electricity | 272 | Expired |
| US5430687A | Programmable logic device including a parallel input device for loading memory cells | Electricity | 272 | Expired |
| US6150838A | FPGA configurable logic block with multi-purpose logic/memory circuit | Electricity | 271 | Expired |
| US6480954B2 | Method of time multiplexing a programmable logic device | Electricity | 266 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.