Preventing software thread blocking due to interrupts
US10019391B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2015 |
| Grant date | Jul 10, 2018 |
| Priority date | — |
| Expiry date | Dec 14, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4881
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one exemplary embodiment, a method for preventing a software thread from being blocked due to processing an external device interrupt is provided. The method may include receiving the software thread, whereby the software thread has an associated interrupt avoidance variable. The method may also include determining a processor to receive the software thread. The method may then include sending the software thread to the determined processor. The method may further include setting an interrupt mask bit associated with the processor based on the interrupt avoidance variable. The method may also include receiving the external device interrupt. The method may then include redirecting the received external device interrupt to a second processor, whereby the redirecting is based on the interrupt mask bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.