Dirk Michel
46Patents
8h-index
26Co-inventors
71Inventor score
Filing activity: Apr 23, 2003 → Jan 2, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8037203B2 | User defined preferred DNS reference | Electricity | 57 | Active |
| US7739422B2 | Method to improve system DMA mapping while substantially reducing memory fragmentation | Physics | 28 | Active |
| US7278141B2 | System and method for adding priority change value corresponding with a lock to a thread during lock processing | Physics | 22 | Expired |
| US7543124B1 | Method for preventing page replacement of unreferenced read-ahead file pages | Physics | 13 | Active |
| US7698707B2 | Scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval | Physics | 12 | Active |
| US7360218B2 | System and method for scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval | Physics | 12 | Expired |
| US8359449B2 | Prioritizing virtual real memory paging based on disk capabilities | Physics | 10 | Active |
| US7353517B2 | System and method for CPI load balancing in SMT processors | Physics | 9 | Expired |
| US9727361B2 | Closed-loop feedback mechanism for achieving optimum performance in a consolidated workload environment | Emerging Cross-Sectional Technologies | 8 | Active |
| US8245236B2 | Lock based moving of threads in a shared processor partitioning environment | Physics | 8 | Active |
| US7380247B2 | System for delaying priority boost in a priority offset amount only after detecting of preemption event during access to critical section | Physics | 7 | Expired |
| US7080220B2 | Page replacement with a re-reference indicator | Physics | 6 | Expired |
| US8954974B1 | Adaptive lock list searching of waiting threads | Physics | 6 | Active |
| US10102037B2 | Averting lock contention associated with core-based hardware threading in a split core environment | Physics | 5 | Active |
| US7318140B2 | Method and apparatus for dynamic hosting partition page assignment | Physics | 5 | Expired |
| US10019391B2 | Preventing software thread blocking due to interrupts | Physics | 5 | Active |
| US9354934B2 | Partitioned shared processor interrupt-intensive task segregator | Physics | 5 | Active |
| US10831539B2 | Hardware thread switching for scheduling policy in a processor | Electricity | 3 | Active |
| US9038084B2 | Managing utilization of physical processors of a shared processor pool in a virtualized processor environment | Physics | 3 | Active |
| US10572411B2 | Preventing software thread blocking due to interrupts | Physics | 3 | Active |
| US7831980B2 | Scheduling threads in a multi-processor computer | Physics | 3 | Active |
| US8327176B2 | Optimizing power management in multicore virtual machine platforms by dynamically variable delay before switching processor cores into a low power state | Emerging Cross-Sectional Technologies | 3 | Active |
| US9208089B2 | Selective release-behind of pages based on repaging history in an information handling system | Physics | 2 | Active |
| US8489824B2 | Selective memory compression for multi-threaded applications | Physics | 2 | Active |
| US8499138B2 | Demand-based memory management of non-pagable data storage | Physics | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.