Wafer-level back-end fabrication systems and methods
US10020343B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Sep 23, 2016 |
| Grant date | Jul 10, 2018 |
| Priority date | — |
| Expiry date | Sep 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/809
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods may be provided for fabricating infrared focal plane arrays. The methods include providing a device wafer, applying a coating to the device wafer, mounting the device wafer to a first carrier wafer, thinning the device wafer while the device wafer is mounted to the first carrier wafer, releasing the device wafer from the first carrier wafer, singulating the device wafer into individual dies, each die having an infrared focal plane array, and hybridizing the individual dies to a read out integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.