Patent · US Active

Check pointing a shift register using a circular buffer

US10025527B2 · kind B2 · utility

1Cited by
2References
20Claims
0Family size

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Key dates

Filing dateJul 8, 2016
Grant dateJul 17, 2018
Priority date
Expiry dateJul 22, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/3863
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Hardware structures for check pointing a main shift register one or more times which include a circular buffer used to store the data elements most recently shifted onto the main shift register which has an extra data position for each check point and an extra data position for each restorable point in time; an update history shift register which has a data position for each check point which is used to store information indicating whether the circular buffer was updated in a particular clock cycle; a pointer that identifies a subset of the data positions of the circular buffer as active data positions; and check point generation logic that derives each check point by selecting a subset of the active data positions based on the information stored in the update history shift register.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.