Patent · US Active

Phase locked loops having decoupled integral and proportional paths

US10027333B2 · kind B2 · utility

2Cited by

4References

20Claims

0Family size

Assignee

STMicroelectronics International N.V. · NL

Inventors

Abhirup Lahiri · Dublin, IE
Nitin Gupta · Savanuru, IN
Gagan Midha · Panipat, IN

Key dates

Filing date	Nov 18, 2016
Grant date	Jul 17, 2018
Priority date	—
Expiry date	Nov 18, 2036

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/1976
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An embodiment circuit includes a first charge pump configured to generate a first current at a first node, and a second charge pump configured to generate a second current at a second node. The circuit further includes an isolation buffer coupled between the first node and the second node and an adder having a first input coupled to the second node. The circuit additionally includes an auxiliary charge pump configured to generate a third current at a second input of the adder, and an oscillator having an input coupled to an output of the adder.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.