Non-linear physically unclonable function (PUF) circuit with machine-learning attack resistance
US10027472B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2016 |
| Grant date | Jul 17, 2018 |
| Priority date | — |
| Expiry date | Sep 27, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/3278
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Embodiments include apparatuses, methods, and systems for a physically unclonable function (PUF) circuit. The PUF circuit may include an array of PUF cells to generate respective response bits of an authentication code in response to a challenge bit string. The PUF cells may include a pair of cross-coupled inverters, the individual inverters including independently selectable pull-down or pull-up legs. One of the pull-up or pull-down legs of each inverter may be selectively activated based on the challenge bit string. The PUF cells may further include first and second configurable clock delay circuits to pass respective clock signals to pre-charge transistors of the PUF cell. A dark bit masking circuit may generate a soft dark bit mask for the PUF circuit. Other embodiments may be described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.