Vikram Suresh
61Patents
5h-index
28Co-inventors
68Inventor score
Filing activity: Dec 19, 2011 → Sep 7, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10928847B2 | Apparatuses and methods for frequency scaling a message scheduler data path of a hashing accelerator | Electricity | 28 | Active |
| US9013949B2 | Memory access control system and method | Physics | 13 | Active |
| US9189202B2 | Generate random numbers using metastability resolution time | Physics | 7 | Active |
| US9825647B1 | Method and apparatus for decompression acceleration in multi-cycle decoder based platforms | Electricity | 6 | Active |
| US9806719B1 | Physically unclonable circuit having a programmable input for improved dark bit mask accuracy | Electricity | 5 | Active |
| US10177782B2 | Hardware apparatuses and methods for data decompression | Physics | 4 | Active |
| US9564917B1 | Instruction and logic for accelerated compressed data decoding | Electricity | 4 | Active |
| US10027472B2 | Non-linear physically unclonable function (PUF) circuit with machine-learning attack resistance | Electricity | 4 | Active |
| US10694217B2 | Efficient length limiting of compression codes | Electricity | 4 | Active |
| US10142098B2 | Optimized SHA-256 datapath for energy-efficient high-performance Bitcoin mining | Electricity | 4 | Active |
| US9910792B2 | Composite field scaled affine transforms-based hardware accelerator | Electricity | 3 | Active |
| US11121856B2 | Unified AES-SMS4—Camellia symmetric key block cipher acceleration | Electricity | 3 | Active |
| US10313108B2 | Energy-efficient bitcoin mining hardware accelerators | Electricity | 3 | Active |
| US9843441B2 | Compact, low power advanced encryption standard circuit | Electricity | 3 | Active |
| US10705842B2 | Hardware accelerators and methods for high-performance authenticated encryption | Electricity | 3 | Active |
| US10129018B2 | Hybrid SM3 and SHA acceleration processors | Electricity | 3 | Active |
| US10346343B2 | Hardware accelerator for platform firmware integrity check | Physics | 3 | Active |
| US11082241B2 | Physically unclonable function with feed-forward addressing and variable latency output | Electricity | 2 | Active |
| US11405213B2 | Low latency post-quantum signature verification for fast secure-boot | Electricity | 2 | Active |
| US10579339B2 | Random number generator that includes physically unclonable circuits | Electricity | 2 | Active |
| US10911063B2 | Adaptive speculative decoding | Electricity | 2 | Active |
| US9825649B1 | Efficient huffman decoder improvements | Electricity | 2 | Active |
| US11303429B2 | Combined SHA2 and SHA3 based XMSS hardware accelerator | Electricity | 2 | Active |
| US11218320B2 | Accelerators for post-quantum cryptography secure hash-based signing and verification | Electricity | 1 | Active |
| US10326596B2 | Techniques for secure authentication | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.