Operation processing for high level synthesis
US10031732B1 · kind B1 · utility
4Cited by
32References
15Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 2, 2016 |
| Grant date | Jul 24, 2018 |
| Priority date | — |
| Expiry date | Aug 10, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
High level synthesis can include detecting, using a processor, an enumerated operation within an instruction of a loop construct of an application, determining, using the processor, whether the loop construct meets a modification condition, and responsive to determining that the loop construct meets the modification condition, modifying, using the processor, the loop construct to calculate the enumerated operation as a compile time constant, wherein the modified loop construct is functionally equivalent to the loop construct.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.