Duo content addressable memory (CAM) using a single CAM
US10032516B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 13, 2017 |
| Grant date | Jul 24, 2018 |
| Priority date | — |
| Expiry date | Jun 13, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a content addressable memory (CAM). The content addressable memory array includes a memory array and a data match module. The memory array includes multiple memory rows. Each memory row is configured to store a first data word and a second data word. The data match module includes a first match circuitry configured to compare a first match word to the first data word of a memory row, and to generate a first match output based on the comparison between the first match word and the first data word of the memory row. The data match module further includes a second match circuitry configured to compare a second match word to the second data word of the memory row, and to generate a second match output based on the comparison between the second match word and the second data word of the memory row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.