Fuse circuit, repair control circuit, and semiconductor apparatus including the same
US10032525B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 12, 2017 |
| Grant date | Jul 24, 2018 |
| Priority date | — |
| Expiry date | Apr 12, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fuse circuit may include a plurality of first fuse sets and a plurality of second fuse sets. The plurality of first fuse sets may be used to store a defect address detected before packaging of a semiconductor apparatus. The plurality of second fuse sets may be used to store a defect address detected after the packaging. The plurality of first fuse sets may be shared by a plurality of first redundant word lines, and the plurality of second fuse sets may be in one-to-one correspondence with a plurality of second redundant word lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.