One transistor and one resistive random access memory (RRAM) structure with spacer

US10038139B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Hsia-Wei Chen · Taipei, TW
• Wen-Ting Chu
• Kuo-Chi Tu · Baoshan, TW
• Chin-Chieh Yang · New Taipei, TW
• Chih-Yang Chang · 員林市, TW
• Yu-Wen Liao · New Taipei, TW

Key dates

• Filing date: May 2, 2016
• Grant date: Jul 31, 2018
• Expiry date: May 2, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8833

Abstract

The present disclosure provides a resistive random access memory (RRAM) cells and methods of making the same. The RRAM cell includes a transistor and an RRAM structure. The RRAM structure includes a bottom electrode having a via portion and a top portion, a resistive material layer on the bottom electrode having a width that is same as a width of the top portion of the bottom electrode; a capping layer over the bottom electrode; a spacer surrounding the capping layer; and, a top electrode on the capping layer having a smaller width than the resistive material layer. The RRAM cell further includes a conductive material connecting the top electrode of the RRAM structure to a metal layer.