Chin-Chieh Yang
83Patents
12h-index
23Co-inventors
80Inventor score
Filing activity: Nov 9, 2012 → Jul 28, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10008662B2 | Perpendicular magnetic tunneling junction (MTJ) for improved magnetoresistive random-access memory (MRAM) process | Electricity | 45 | Active |
| US9601545B1 | Series MIM structures compatible with RRAM process | Electricity | 40 | Active |
| US9431604B2 | Resistive random access memory (RRAM) and method of making | Electricity | 27 | Active |
| US8963114B2 | One transistor and one resistive (1T1R) random access memory (RRAM) structure with dual spacers | Electricity | 26 | Active |
| US9172036B2 | Top electrode blocking layer for RRAM device | Electricity | 22 | Active |
| US9023699B2 | Resistive random access memory (RRAM) structure and method of making the RRAM structure | Electricity | 21 | Active |
| US9577009B1 | RRAM cell with PMOS access transistor | Physics | 18 | Active |
| US9231197B2 | Logic compatible RRAM structure and process | Electricity | 18 | Active |
| US9553265B1 | RRAM device with data storage layer having increased height | Electricity | 16 | Active |
| US9099647B2 | One transistor and one resistive (1T1R) random access memory (RAM) structure with dual spacers | Electricity | 15 | Active |
| US9425392B2 | RRAM cell structure with laterally offset BEVA/TEVA | Electricity | 13 | Active |
| US8742390B1 | Logic compatible RRAM structure and process | Electricity | 13 | Active |
| US9076522B2 | Memory cells breakdown protection | Physics | 12 | Active |
| US10504963B2 | RRAM memory cell with multiple filaments | Electricity | 10 | Active |
| US9647207B2 | Resistive random access memory (RRAM) structure | Electricity | 8 | Active |
| US9312482B2 | Resistance variable memory structure and method of forming the same | Physics | 7 | Active |
| US8921818B2 | Resistance variable memory structure | Electricity | 7 | Active |
| US9537094B2 | Logic compatible RRAM structure and process | Electricity | 6 | Active |
| US9331277B2 | One transistor and one resistive random access memory (RRAM) structure with spacer | Electricity | 6 | Active |
| US10163981B2 | Metal landing method for RRAM technology | Electricity | 6 | Active |
| US10566519B2 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Electricity | 6 | Active |
| US9112148B2 | RRAM cell structure with laterally offset BEVA/TEVA | Electricity | 5 | Active |
| US10038139B2 | One transistor and one resistive random access memory (RRAM) structure with spacer | Electricity | 5 | Active |
| US9349953B2 | Resistance variable memory structure and method of forming the same | Physics | 5 | Active |
| US9478638B2 | Resistive switching random access memory with asymmetric source and drain | Electricity | 5 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.