Patent · US Active

Apparatuses and methods for adaptive control of memory using an adaptive memory controller with a memory management hypervisor

US10042750B2 · kind B2 · utility

10Cited by
13References
27Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 6, 2013
Grant dateAug 7, 2018
Priority date
Expiry dateJan 1, 2034

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Apparatuses and methods for adaptive control of memory are disclosed. One example apparatus includes a processing unit configured to run an operating system, and a memory coupled to the processing unit. The memory configured to communicate with the processing unit via a memory bus. The example apparatus may further include an adaptive memory controller configured to receive monitored statistical data from the memory and from the processing unit. The adaptive memory controller is configured to manage the memory based on the monitored statistical data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.