Data processing apparatus with snoop request address alignment and snoop response time alignment
US10042766B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 2, 2017 |
| Grant date | Aug 7, 2018 |
| Priority date | — |
| Expiry date | Feb 2, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A home node of a data processing apparatus that includes a number of devices coupled via an interconnect system is configured to provide efficient transfer of data to a first device from a second device. The home node is configured dependent upon data bus widths of the first and second devices and the data bus width of the interconnect system. Data is transferred as a cache line serialized into a number of data beats. The home node may be configured to minimize the number of data transfers on the third data bus or to minimize latency in the transfer of the critical beat of the cache line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.