Vertical multi-junction light emitting diode
US10043942B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Oct 14, 2014 |
| Grant date | Aug 7, 2018 |
| Priority date | — |
| Expiry date | May 6, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/833
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment of the invention comprises a first III-V semiconductor structure including a first light emitting layer disposed between a first n-type region and a first p-type region, and a second III-V semiconductor structure including a second light emitting layer disposed between a second n-type region and a second p-type region. A first contact is formed on a top surface of the first III-V semiconductor structure. A second contact is formed on a bottom surface of the second III-V semiconductor structure. A bonding structure is disposed between the first and second III-V semiconductor structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.