Patent · US Active

Asynchronous cache flushing

US10049044B2 · kind B2 · utility

2Cited by

2References

20Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Michael W. Boyer · Bellevue, US
Gabriel H. Loh · Bellevue, US
Nuwan Jayasena · Santa Clara, US

Key dates

Filing date	Jun 14, 2016
Grant date	Aug 14, 2018
Priority date	—
Expiry date	Sep 30, 2036

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/70
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Proactive flush logic in a computing system is configured to perform a proactive flush operation to flush data from a first memory in a first computing device to a second memory in response to execution of a non-blocking flush instruction. Reactive flush logic in the computing system is configured to, in response to a memory request issued prior to completion of the proactive flush operation, interrupt the proactive flush operation and perform a reactive flush operation to flush requested data from the first memory to the second memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.