Method and system for using processor enclaves and cache partitioning to assist a software cryptoprocessor
US10049048B1 · kind B1 · utility
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36References
20Claims
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Key dates
| Filing date | Oct 1, 2014 |
| Grant date | Aug 14, 2018 |
| Priority date | — |
| Expiry date | Oct 13, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor cache is logically partitioned into a main partition, located in the cache itself, and an enclave partition, located within an enclave, that is, a hardware-enforced protected region of an address space of a memory. This extends the secure address space usable by and for an application such as a software cryptoprocessor that is to execute only in secure regions of cache or memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.