Write assist for memories with resistive bit lines
US10049725B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2016 |
| Grant date | Aug 14, 2018 |
| Priority date | — |
| Expiry date | Dec 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques efficiently assist in performing write operations in memories with resistive bit lines. A memory can comprise memory cells associated with respective word lines and bit lines. A write assist component can be associated with a subset of the memory cells associated with a bit line. Configuration of the write assist component can be based on the type of transistors employed by write circuits associated with the memory cells. During a write operation, the write assist component adds an additional current path to the ground, or the power supply, or both, at or in proximity to the far end of the write bit line when an appropriate write polarity is applied to the bit line by the driver at the other end of the bit line. This mitigates the effects of resistance of the bit line, which mitigates IR loss of the write signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.