Patent · US Active

Read concurrency using hardware transactional lock elision

US10055129B2 · kind B2 · utility

4Cited by
5References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 22, 2016
Grant dateAug 21, 2018
Priority date
Expiry dateJul 13, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/524
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Threads using hardware transactions and executing instrumented critical sections that do not perform any writes may complete as long as the thread holding the lock has not yet executed its first write operation. If the thread executing the instrumented critical section performs any writes, or if the thread holding the lock performs any writes during its critical section, the hardware transaction may be aborted. A write flag may be used to determine whether the thread holding the lock performs any writes. The thread holding the lock may set the flag before performing any write operation. The thread executing the hardware transaction may subscribe to that flag and abort the transaction if the flag is set to true, indicating that the thread holding the lock performed a write operation.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.