Semiconductor package and method for routing the package
US10056321B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2013 |
| Grant date | Aug 21, 2018 |
| Priority date | — |
| Expiry date | Nov 4, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package having improved performance and reliability and a method of fabricating the same are provided. The semiconductor package includes a processing chip including a first pin at a first side to output a first signal, and a second pin at a second side to output a second signal different from the first signal, and a substrate having the processing chip thereon, the substrate including a first bump ball electrically connected to the first pin and a second bump ball electrically connected to the second pin, wherein the first bump ball and the second bump ball are adjacent at one of the first and second sides of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.