Prototyping of electronic circuits with edge interconnects
US10056335B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2017 |
| Grant date | Aug 21, 2018 |
| Priority date | — |
| Expiry date | Sep 26, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/183
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of forming an assembly including projecting or protruding nodules, a substrate is provided that supports an electrical circuit. One or more cavities are formed in the substrate, a conductive pad is formed in each cavity, and one or more conductive traces are formed on the substrate. Each conductive trace connects a conductive pad to a location, node, or terminal of the electrical circuit. A part of the substrate is removed to form the assembly that includes the electrical circuit, the one or more conductive traces, and a portion of each conductive pad projecting or protruding from the substrate. The electrical circuit can be formed on the substrate, which can be a PCB, or can be formed on a microchip supported by the substrate, which can be formed of semiconductor material, e.g., a semiconductor wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.