Semiconductor device and manufacturing method thereof
US10056498B2 · kind B2 · utility
4Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2017 |
| Grant date | Aug 21, 2018 |
| Priority date | — |
| Expiry date | Jan 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0128
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a field effect transistor (FET) device includes a substrate and a channel structure formed of a two-dimensional (2D) material. An interfacial layer is formed on the channel structure. A gate stack including a gate electrode layer and a gate dielectric layer is formed over the interfacial layer. Source and drain contacts are formed over openings in the interfacial layer. The source and drain contacts have a side contact with the interfacial layer and a side contact and a surface contact with the channel structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.