Method for forming semiconductor structure
US10062584B1 · kind B1 · utility
1Cited by
4References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2017 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | Jun 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02326
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor structure is disclosed. The method includes the following steps. A first pattern structure and a second pattern structure are formed on a substrate. The second pattern structure is wider than the first pattern structure. Spacers are formed on sidewall surfaces of the first pattern structure and the second pattern structure. An oxidizing treatment step is performed to the spacers having a width gradually increased from tops of the spacers. A pattern defined with the spacers is transferred into the substrate after the oxidizing treatment step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.