Semiconductor device
US10062669B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 29, 2016 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | Dec 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device according to the present invention includes: a through via formed to penetrate a semiconductor substrate; first and second buffer circuits; a wiring forming layer formed in an upper layer of the semiconductor substrate; a connecting wiring portion formed in an upper portion of the through via assuming that a direction from the semiconductor substrate to the wiring forming layer is an upward direction, the connecting wiring portion being formed on a chip inner end face that faces the upper portion of the semiconductor substrate at an end face of the through via; a first path connecting the first buffer circuit and the through via; and a second path connecting the second buffer circuit and the through via. The first path and the second path are electrically connected through the connecting wiring portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.