Semiconductor device and method of manufacturing the same
US10062707B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 22, 2017 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | May 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/231
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided here may be a semiconductor device and a method of manufacturing the same. The semiconductor device may include a first source seed layer, a second source seed layer disposed over the first source seed layer at a position spaced apart from the first source seed layer with a source area interposed between the first source seed layer and the second source seed layer, cell plugs configured to penetrate through the second source seed layer and extend into the source area, the cell plugs being disposed at positions spaced apart from the first source seed layer. The semiconductor device may also include an interlayer source layer configured to fill the source area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.