Semiconductor device having void between gate electrode and sidewall spacer and manufacturing method thereof
US10062764B1 · kind B1 · utility
12Cited by
3References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2017 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | Jul 31, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a gate structure, a spacer, a mask layer, and at least one void. The gate structure is disposed on the substrate, and the gate structure includes a metal gate electrode. The spacer is disposed on sidewalls of the gate structure, and a topmost surface of the spacer is higher than a topmost surface of the metal gate electrode. The mask layer is disposed on the gate structure. At least one void is disposed in the mask layer and disposed between the metal gate electrode and the spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.