Nonvolatile memory device including multiple planes
US10062765B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2017 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | Jul 17, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device includes bit lines arranged in a first direction over a substrate; a memory cell array disposed between the substrate and the bit lines, and including a plurality of planes which are arranged in a second direction perpendicular to the first direction; page buffer circuits disposed between the substrate and the memory cell array; contact pads disposed between the substrate and the memory cell array, the contact pads being suitable for electrically coupling the bit lines and the page buffer circuits; and routing lines disposed at the same layer as the contact pads, and extending in the second direction, wherein the contact pads are disposed to overlap with at least two lines which are arranged in the second direction, and the routing lines are formed in a bent pattern to pass between the contact pads which are disposed to overlap with different lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.