Product performance test binning
US10067184B2 · kind B2 · utility
2Cited by
12References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 11, 2011 |
| Grant date | Sep 4, 2018 |
| Priority date | — |
| Expiry date | Dec 26, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31701
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method, test system and computer program product and system for voltage binning integrated circuit chips. The method includes selecting or changing a voltage bin of a set of voltages bins corresponding to frequency specification limits of an integrated circuit chip using functional testing of data paths of the integrated circuit chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.