Non-volatile memory with multi-pass programming
US10068656B2 · kind B2 · utility
1Cited by
6References
21Claims
0Family size
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Key dates
| Filing date | Dec 27, 2016 |
| Grant date | Sep 4, 2018 |
| Priority date | — |
| Expiry date | Dec 27, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory system implements a multi-pass programming process that includes separately programming groups of memory cells in a common block by performing programming for memory cells that are connected to two adjacent word lines and are part of a first group of memory cells followed by performing programming for other memory cells that are also connected to the two adjacent word lines and are part of a second group of memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.