Data processor device supporting selectable exceptions and method thereof
US10073797B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2008 |
| Grant date | Sep 11, 2018 |
| Priority date | — |
| Expiry date | Oct 5, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/48
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor begins exception processing in response to an exception event. Exception processing by the processor is halted during exception processing to facilitate debugging. The exception event can be a reset exception event or an interrupt exception event. Normal exception processing by the data processor can be resumed after debugging, or exception processing by the data processor can be aborted to allow the normal execution of instructions by the data processor to resume. An exception event can be selectively treated as an interrupt or a reset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.