Repair circuit, semiconductor apparatus and semiconductor system using the same
US10074444B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 19, 2016 |
| Grant date | Sep 11, 2018 |
| Priority date | — |
| Expiry date | Jan 21, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A repair circuit may be provided. The repair circuit may include a latch array including a plurality of latch sets. The repair circuit may include a fuse array including a plurality of fuse sets, and configured to be written, in each fuse set, with repair address data and latch address data which defines a position of a latch set where the repair address data is to be stored, among the plurality of latch sets. The repair circuit may include a first decoder configured to cause data written in any one fuse set among the plurality of fuse sets to be outputted, and a second decoder configured to cause the repair address data to be stored in the latch set corresponding to the latch address data among the plurality of latch sets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.