Method of fabricating semiconductor package including cutting encapsulating body and carrier to form packages
US10074613B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 2017 |
| Grant date | Sep 11, 2018 |
| Priority date | — |
| Expiry date | May 2, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package is provided, including: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface; an encapsulant encapsulating the first surface and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface exposed from the metal layer, wherein the metal layer is formed along a wall surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface. Therefore, the package units are isolated and form a multilayer isolated structure, including metal layers and air layers, and are electromagnetically shielded from one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.