Patent · US Active

Deep trench isolation for RF devices on SOI

US10074650B2 · kind B2 · utility

0Cited by
7References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 3, 2016
Grant dateSep 11, 2018
Priority date
Expiry dateMay 3, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/201
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a silicon-on-insulator (SOI) substrate having a stack of a first semiconductor substrate, a buried insulating layer and a second semiconductor substrate formed in a first region and a deep trench isolation disposed in a second region. The semiconductor device also includes a plurality of transistors on the second semiconductor substrate, a deep trench isolation having a bottom at a surface of the first semiconductor substrate in the second region, the deep trench isolation exposing a sidewall of the second semiconductor substrate and a sidewall of the buried insulating layer, and a dielectric capping layer filling the deep trench isolation and covering the plurality of transistors on the second semiconductor substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.