Semiconductor device manufacturing method
US10079155B2 · kind B2 · utility
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4Claims
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Key dates
| Filing date | Jul 6, 2017 |
| Grant date | Sep 18, 2018 |
| Priority date | — |
| Expiry date | Jul 6, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13055
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device manufacturing method, sequentially includes a semiconductor element preparation step of preparing a first semiconductor element on which is formed a plurality of metal electrodes, a step of covering a surface of the first semiconductor element on which the metal electrode is not formed with a first insulating member, and a step of forming a second metal layer that conductively connects the metal electrode of the first semiconductor element and a first metal layer on an insulated circuit substrate across the second insulating member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.