Built-in self-test for ADC
US10079610B2 · kind B2 · utility
3Cited by
4References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2016 |
| Grant date | Sep 18, 2018 |
| Priority date | — |
| Expiry date | Jul 5, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/804
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Representative implementations of devices and techniques provide a built-in self-test (BIST) for an analog-to-digital converter (ADC). Stimuli needed to test an ADC are generated within the chip containing the ADC. Evaluation circuitry is also available on-chip. Generation and evaluation circuits and systems are based on existing circuits and/or components of the chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.