Generating and/or employing a descriptor associated with a memory translation table
US10083131B2 · kind B2 · utility
1Cited by
5References
20Claims
0Family size
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Key dates
| Filing date | Dec 11, 2014 |
| Grant date | Sep 25, 2018 |
| Priority date | — |
| Expiry date | Sep 20, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various aspects facilitate implementing a memory translation table associated with key-based indexing. A table component is configured for generating a memory translation table and a key component is configured for allocating a key associated with a memory access based on a virtual address and a set of access permissions. A descriptor component is configured for generating a descriptor associated with the memory translation table that comprises at least the set of access permissions and a portion of the key.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.