Method of packaging integrated circuit die and device
US10083912B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2016 |
| Grant date | Sep 25, 2018 |
| Priority date | — |
| Expiry date | May 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15151
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package substrate having an opening and through-substrate interconnect structures is attached to a temporary carrier such as an adhesive film. The active surface of an IC die is placed in contact with the carrier substrate within the opening, to temporarily attach the die to the carrier substrate. Another die is attached to the side of the first die furthest from the carrier substrate. In one embodiment, the dies are attached to each other using an epoxy so that their respective non-active surfaces face each other. Bond wires are connected between interconnects at the active surface of the second die and the substrate. The wires are then encapsulated. After removal of the carrier substrate, a build-up interconnect structure is formed that includes external interconnects of the package substrate, such as solder balls of a ball grid array package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.