Patent · US Active

Minimizing latency from peripheral devices to compute engines

US10089019B2 · kind B2 · utility

0Cited by
4References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 21, 2016
Grant dateOct 2, 2018
Priority date
Expiry dateApr 5, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG09G2360/08
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods, systems, and computer program products are provided for minimizing latency in a implementation where a peripheral device is used as a capture device and a compute device such as a GPU processes the captured data in a computing environment. In embodiments, a peripheral device and GPU are tightly integrated and communicate at a hardware/firmware level. Peripheral device firmware can determine and store compute instructions specifically for the GPU, in a command queue. The compute instructions in the command queue are understood and consumed by firmware of the GPU. The compute instructions include but are not limited to generating low latency visual feedback for presentation to a display screen, and detecting the presence of gestures to be converted to OS messages that can be utilized by any application.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.