Patent · US Active

Storage operation interrupt

US10089021B2 · kind B2 · utility

1Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 22, 2018
Grant dateOct 2, 2018
Priority date
Expiry dateMar 22, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F3/0688
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Apparatuses, systems, methods, and computer program products are disclosed for interrupting storage operations. An integrated circuit chip comprising non-volatile memory, the integrated circuit chip configured to, determine a number of portions into which a storage operation is to be split; pause execution of the storage operation from within the integrated circuit chip according to the determined number of portions; execute one or more other storage operations on the integrated circuit chip while the storage operation is paused, each of the one or more other storage operations having a shorter duration than the storage operation; and continue the paused storage operation in response to a trigger.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.