System and method for managing semiconductor manufacturing defects
US10089161B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 7, 2017 |
| Grant date | Oct 2, 2018 |
| Priority date | — |
| Expiry date | Nov 7, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2849
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure generally provides for a method of managing semiconductor manufacturing defects. The method includes: determining a cumulative aging parameter for each of a plurality of first IC products produced with a particular manufacturing line, the cumulative aging parameter being dependent on a product operating condition; calculating an observed defect rate for the plurality of first IC products based on a difference between a predicted value of the aging parameter and the cumulative aging parameter for each of the plurality of first IC products; and adjusting a manufacturing reliability model for the particular manufacturing line in response to the observed defect rate being different from a predicted defect rate for the plurality of first IC products.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.